Power and thermal management components become a new AI chokepoint

The dawn of AI deployment is pushing semiconductor performance to new levels, but with companies racing to build new infrastructure, component unavailability is rising. As AI inference consumes more power and generates more heat, thermal management has become a third critical constraint.  

The industry is responding with new chip designs, which can reduce the power required to move increasingly large volumes of data through AI systems. The issue, however, remains the same. Supply is limited, and the pool of available production capacity is even smaller.  

Meanwhile, STMicroelectronics is reportedly implementing another 2026 price increase as power lead times shoot past 52 weeks. This follows recent price increases from NXP, Infineon, and other suppliers due to numerous factors including mature-node capacity, material costs, and memory constraints.  

Heat emerges as AI’s next major bottleneck

Heat dissipation is increasingly being named as one of the biggest constraints on AI infrastructure growth, according to multiple semiconductor packaging experts. With AI accelerators and high-end memory adopting increasingly complex three-dimensional stacking, thermal loads are rising faster than current cooling techniques can keep up.  

According to TrendForce, thermal design power for individual AI chips from major manufacturers has surpassed 1 kilowatt, and rack-scale systems now draw hundreds. As these systems generate greater thermal loads inside data centers with footprints spanning acres, cooling becomes increasingly important.  

KAIST professor Kim Joung -ho told ETNews this challenge threatens to slow AI expansion. Memory is a particular concern. Beyond HBM, which already stacks DRAM layers, next-gen formats based on stacked NAND flash and stacked SRAM are expected to introduce additional thermal complexity as they scale.  

Ironically, Kim also suggests AI could be part of the answer to its own problem. Design automation tools for testing chip structures are already being used in labs to optimize heat dissipation. In the future, Kim hopes to see additional tools capable of autonomously handling increasingly intricate designs and providing solutions compatible with physical constraints.  

In the meantime, human-led packaging strategy is also evolving to accommodate the need for better thermal management. With the AI industry prioritizing heat dissipation, even over further performance gains in some cases, new approaches are gaining traction. Co-packaged optics (CPO) and system-technology co-optimization (STCO) are two making waves.  

The latter takes a broad approach, optimizing the chip, packaging, and system together rather than treating thermal performance as a separate problem to solve. CPO replaces some electrical interconnects with optical connections to cut power consumption and heat generation. Of course, these technologies bring their own manufacturing challenges and, if they prove worthy, will need years to reach production at scale.  

As thermal management becomes a bigger constraint in the chip industry, procurement teams must consider how potential bottlenecks at all levels of the supply chain will affect production. Sourceability helps customers monitor product availability and sourcing risks across semiconductor categories, offering improved visibility that enables smarter buying decisions.

Power device lead times and prices climb

STMicroelectronics is preparing its third price increase of 2026, which will reportedly become effective August 23rd. The company cited strong demand across multiple end markets alongside rising costs for transportation, energy, raw materials, and manufacturing services, though it has not disclosed which products are affected or how much prices will rise.

This year has already seen STMicroelectronics implement two price hikes, effective on April 26th and June 28th. The first targeted automotive power semiconductors and high-end industrial MCUs while the latter extended the increases to general-purpose MCUs, power ICs, and NFC RF chips.  

At the same time as prices are climbing, power semiconductor availability is tightening across the board. Lead times for some devices have reportedly stretched to 52 weeks, well beyond typical planning cycles. Mature-node manufacturing sits at the center of the shortage considering power devices remain heavily dependent on 8-inch wafer production, a segment already running near capacity.  

Unsurprisingly, AI buildouts are adding to the strain. Power management and power semiconductor products are experiencing increasing demand as data center hyperscalers race to expand their operations.  

Tight mature-node capacity can also be attributed in part to foundries reducing or repurposing older production lines. Many are shifting output toward higher-value products destined for AI use cases, leaving less mature-node capacity available for consumer devices and standard power products.  

Beyond the semiconductor sector, extended lead times have consequences for industrial and automotive manufacturers. Both are heavily dependent on power semiconductors and now face a growing risk of production delays tied to component availability.  

The first wave of the AI boom centered on GPUs, HBM, and leading-edge manufacturing capacity, but as those systems become more powerful, constraints are spreading to the technologies that enable them. Repeating price hikes and stretching lead times for power devices are part of a wider pattern that includes tightening mature-node capacity and rising costs across the board.  

Today’s procurement teams must look beyond headline AI components and monitor the entire bill of materials for emerging constraints. Sourceability helps customers secure hard-to-find components and evaluate alternate sourcing opportunities both proactively and, if needed, reactively.